Detection, Localisation and Identification of Interconnection Faults Using MISR Compactor

T. Garbolino, M. Kopec, K. Gucwa, A. Hlawiczka
{"title":"Detection, Localisation and Identification of Interconnection Faults Using MISR Compactor","authors":"T. Garbolino, M. Kopec, K. Gucwa, A. Hlawiczka","doi":"10.1109/DDECS.2006.1649621","DOIUrl":null,"url":null,"abstract":"The paper introduces a novel idea of interconnect fault detection, localization and identification based on test response compaction using a MISR. The above-mentioned operations are made at-speed. The localization is done by means of three long, full diagnostic resolution sequences: Walking 1 (W1), Walking 0 (W0) and a part of Johnson sequence (J). The final fault identification phase exploits information stored in two or three signatures","PeriodicalId":158707,"journal":{"name":"2006 IEEE Design and Diagnostics of Electronic Circuits and systems","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE Design and Diagnostics of Electronic Circuits and systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DDECS.2006.1649621","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

The paper introduces a novel idea of interconnect fault detection, localization and identification based on test response compaction using a MISR. The above-mentioned operations are made at-speed. The localization is done by means of three long, full diagnostic resolution sequences: Walking 1 (W1), Walking 0 (W0) and a part of Johnson sequence (J). The final fault identification phase exploits information stored in two or three signatures
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
基于MISR压缩器的互连故障检测、定位与识别
本文介绍了一种基于MISR测试响应压缩的互连故障检测、定位和识别的新思路。上述操作都是在高速下进行的。定位是通过三个长而完整的诊断解析序列来完成的:行走1 (W1),行走0 (W0)和部分约翰逊序列(J)。最后的故障识别阶段利用存储在两个或三个签名中的信息
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Sensor powering with integrated MOS compatible solar cell array Run-Time Debugging and Monitoring of FPGA Circuits Using Embedded Microprocessor On the Use of Information Redundancy When Designing Secure Chips Low-Cost Concurrent Error Detection for FSMs Implemented Using Embedded Memory Blocks of FPGAs FPGA-based fault simulator
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1