RFIC Complexity a Challenge for Academia and Industry

Abstract

Over the last 25 years RF integrated circuits have evolved from bipolar ICs integrating a handful of transistors into highly complex RF CMOS SoCs with millions of transistors. The high volume of mobile and short-range communication terminals has been the major driving force behind the evolution. RF BiCMOS and RF CMOS have opened the stage for creativity in the implementation of RF architectures. Homodyne, Low-IF and Sliding-IF are some of the mayor milestones on the receive side. For the transmit side digital RF techniques e.g., ADPLLs and RF-DACs have matured over the last few years. The evolution of the technical capabilities described combined with market demands of high volume of mobile and short-range communication terminals are driving the complexity RF SoCs in academia and industry. The complexity of RF ICs in academia a probably an order of magnitude low than in industry, whereas the experience of experienced industrial R&D compensates this compared to student IC designers. Thus, pre-tapeout verification is a mayor challenge for both groups in order to achieve a “fully functional first-time right design” of RF SoCs.