Backside IR Photon Emission Microscopy (IR-PEM) Observation in Failure Analysis of the Packaged Devices

Abstract

IR Photon Emission Microscopy (IR-PEM) has been widely used in the failure localization of CMOS ICs and its samples include wafer-level samples and packaged devices. For the wafer-level samples, directly observing is possible, while decapsulation must be implemented for the packaged devices. However, due to an increase of the metal interconnection layers in ICs. it is difficult, if not impossible, to obtain the IR emission image from the frontside of the die. Fortunately, silicon shows good transparency to IR. so it is feasible to get the IR emission image from the backside of the chip, which means backside decapsulation and further thinning the silicon substrate of packaged devices are needed. In this paper, procedures and tools of backside decapsulation will be introduced and the usage of IR-PEM in failure localization of the chips will be revealed.