High-quality ultra-thin HfO/sub 2/ gate dielectric MOSFETs with TaN electrode and nitridation surface preparation

R. Choi, C. Kang, B. Lee, K. Onishi, R. Nieh, S. Gopalan, E. Dharmarajan, J.C. Lee
{"title":"High-quality ultra-thin HfO/sub 2/ gate dielectric MOSFETs with TaN electrode and nitridation surface preparation","authors":"R. Choi, C. Kang, B. Lee, K. Onishi, R. Nieh, S. Gopalan, E. Dharmarajan, J.C. Lee","doi":"10.1109/VLSIT.2001.934924","DOIUrl":null,"url":null,"abstract":"A surface preparation technique using an NH/sub 3/ anneal has been investigated to reduce interface reaction and consequently the equivalent oxide thickness (EOT) of hafnium oxide for alternative gate dielectric applications. MOSCAPs and MOSFETs were fabricated on the NH/sub 3/ nitrided substrates with HfO/sub 2/ dielectric and TaN gate electrode. Using this nitridation technique, EOT of as thin as 7.1 /spl Aring/ with 10/sup -2/ A/cm/sup 2/ at -1.5 V was obtained. Furthermore, excellent device characteristics and reasonable reliability have been achieved.","PeriodicalId":232773,"journal":{"name":"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"47","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2001.934924","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 47

Abstract

A surface preparation technique using an NH/sub 3/ anneal has been investigated to reduce interface reaction and consequently the equivalent oxide thickness (EOT) of hafnium oxide for alternative gate dielectric applications. MOSCAPs and MOSFETs were fabricated on the NH/sub 3/ nitrided substrates with HfO/sub 2/ dielectric and TaN gate electrode. Using this nitridation technique, EOT of as thin as 7.1 /spl Aring/ with 10/sup -2/ A/cm/sup 2/ at -1.5 V was obtained. Furthermore, excellent device characteristics and reasonable reliability have been achieved.
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高品质的超薄HfO/sub - 2/栅极介电mosfet与TaN电极和氮化表面制备
研究了一种采用NH/sub - 3/退火的表面制备技术,以减少界面反应,从而降低氧化铪的等效氧化厚度(EOT)。采用HfO/sub - 2/介质和TaN栅极在NH/sub - 3/氮化衬底上制备mosscaps和mosfet。采用该技术,在-1.5 V下,在10/sup -2/ A/cm/sup 2/条件下,获得了薄至7.1 /spl Aring/的EOT。此外,还实现了优良的器件特性和合理的可靠性。
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