A high-linearity low-voltage all-MOSFET delta-sigma modulator

Y. Huang, G. Temes, H. Yoshizawa
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引用次数: 7

Abstract

The implementation of a second-order switched-capacitor delta-sigma modulator is described. The modulator uses MOSFETs in their accumulation region as capacitors, with the input branches linearized using series compensation. It utilizes only basic digital CMOS technology and was fabricated in a 1.2 /spl mu/m process. The chip area of the modulator is about 1 mm/sup 2/. Measured results show that the modulator has a 94 dB peak S/THD, a 96 dB peak S/N and an 86 dB peak S/THD+N for a 6 kHz bandwidth with 5.4 mW power dissipation using a 3 V power supply and a 3.6 V capacitor bias voltage.
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一种高线性低电压全mosfet δ - σ调制器
描述了一种二阶开关电容δ - σ调制器的实现。调制器在其积累区使用mosfet作为电容器,输入支路使用串联补偿进行线性化。它仅采用基本的数字CMOS技术,并以1.2 /spl mu/m的工艺制造。该调制器的芯片面积约为1mm /sup /。测量结果表明,在3v电源和3.6 V电容偏置电压下,该调制器在6khz带宽下具有94 dB峰值S/THD、96 dB峰值S/THD+N和86 dB峰值S/THD+N,功耗为5.4 mW。
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