{"title":"The effects of context switching on branch predictor performance","authors":"M. Co, K. Skadron","doi":"10.1109/ISPASS.2001.990679","DOIUrl":null,"url":null,"abstract":"This paper shows that contezt switching is not a significant factor to be considered when performing general branch prediction studies. Branch prediction allows for speculative ezecution by increasing available instruction level parallelism (ILP) and hiding the time required to resolve branch conditions. Accurate simulation of branch prediction is important because bmnch prediction strongly influences the behavior of processor structures. For this study, a timesharing framework was developed by modifying SimpleScalar 's branch predictor simulator. A thorough characterization of the effects of branch predictor configumtion, branch predictor area, and time slice length is provided. As further verification, branch predictor performance with and without flushing the predictor structures is compared. Ezperiments show that operating system wntezt switches have little effect on branch prediction rate when using time slices representative of today's operating systems. Our findings show that this results from the fact that time slices are much larger than the training time required by the bmnch predictor structures. For all predictor configurations tested, the predictors train in under l28K instructions with o r without flushing the branch predictor structures.","PeriodicalId":104148,"journal":{"name":"2001 IEEE International Symposium on Performance Analysis of Systems and Software. ISPASS.","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2001 IEEE International Symposium on Performance Analysis of Systems and Software. ISPASS.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPASS.2001.990679","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
This paper shows that contezt switching is not a significant factor to be considered when performing general branch prediction studies. Branch prediction allows for speculative ezecution by increasing available instruction level parallelism (ILP) and hiding the time required to resolve branch conditions. Accurate simulation of branch prediction is important because bmnch prediction strongly influences the behavior of processor structures. For this study, a timesharing framework was developed by modifying SimpleScalar 's branch predictor simulator. A thorough characterization of the effects of branch predictor configumtion, branch predictor area, and time slice length is provided. As further verification, branch predictor performance with and without flushing the predictor structures is compared. Ezperiments show that operating system wntezt switches have little effect on branch prediction rate when using time slices representative of today's operating systems. Our findings show that this results from the fact that time slices are much larger than the training time required by the bmnch predictor structures. For all predictor configurations tested, the predictors train in under l28K instructions with o r without flushing the branch predictor structures.