The effects of context switching on branch predictor performance

M. Co, K. Skadron
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引用次数: 14

Abstract

This paper shows that contezt switching is not a significant factor to be considered when performing general branch prediction studies. Branch prediction allows for speculative ezecution by increasing available instruction level parallelism (ILP) and hiding the time required to resolve branch conditions. Accurate simulation of branch prediction is important because bmnch prediction strongly influences the behavior of processor structures. For this study, a timesharing framework was developed by modifying SimpleScalar 's branch predictor simulator. A thorough characterization of the effects of branch predictor configumtion, branch predictor area, and time slice length is provided. As further verification, branch predictor performance with and without flushing the predictor structures is compared. Ezperiments show that operating system wntezt switches have little effect on branch prediction rate when using time slices representative of today's operating systems. Our findings show that this results from the fact that time slices are much larger than the training time required by the bmnch predictor structures. For all predictor configurations tested, the predictors train in under l28K instructions with o r without flushing the branch predictor structures.
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上下文切换对分支预测器性能的影响
本文表明,在进行一般支路预测研究时,环境切换不是一个重要的考虑因素。分支预测允许通过增加可用的指令级并行性(ILP)和隐藏解析分支条件所需的时间来推测执行。分支预测的精确模拟非常重要,因为分支预测对处理器结构的行为有很大的影响。本研究通过修改SimpleScalar的分支预测模拟器,开发了一个分时框架。提供了分支预测器配置、分支预测器区域和时间片长度的影响的全面表征。作为进一步验证,比较了有和没有刷新预测器结构的分支预测器性能。实验表明,当使用代表当前操作系统的时间片时,操作系统wintezt开关对支路预测率几乎没有影响。我们的研究结果表明,这是由于时间片比bmch预测器结构所需的训练时间大得多。对于所有测试的预测器配置,预测器在不刷新分支预测器结构的情况下,以少于128k条指令进行训练。
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