Analytical Investigation of Differential Conductance in Submicron HEMT with Two Different Substrates

Abstract

Differential conductance of submicron HEMT is analytically investigated as a function of drain bias for different structural parameters and parasitic effects. Simulation is carried out for two different substrate based devices, Si and sapphire, and comparative study is carried out for those structural parameters at which VGS provides maximum transconductance. Poisson's equation and carrier density equations are simultaneously solved to get drain current variations and parasitic effects are invoked through boundary conditions for realistic results. Result speaks that effect of threshold voltage is negligible on sapphire based device over a wider range of horizontal bias. Nanometric channel length provides almost constant conductance profile with insignificant magnitude.