C2MOS 4K static RAM

K. Ochii, Y. Suzuki, M. Ueno, K. Sato, K. Asahi
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引用次数: 4

Abstract

size, compared with an NMOS RAM of the same capacity, CMOS RAMS have, to date, been limited, at most, to 1K bits. Recently-, higher packing density and reduced cost have been required o f a MOS memory system. CMOS RAMS are no exception. In response t o this demand, a C'MOS(C1ockcd CMOS) 4K static RAM, measuring 4.7 mm square, has been developed. The target for large scale integration, namely 4K bits, within reasonable chip size, has been realized with the following features: (1 ) The RAM is static, in the sense that the content of the On the other hand, having the disadvantage of increased chip
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C2MOS 4K静态RAM
与相同容量的NMOS RAM相比,CMOS RAM迄今为止最多只能存储1K位。近年来,人们对MOS存储系统提出了更高的封装密度和更低的成本的要求。CMOS ram也不例外。针对这一需求,开发了尺寸为4.7平方毫米的C'MOS(c10kcd CMOS) 4K静态RAM。在合理的芯片尺寸范围内,实现了大规模集成的目标,即4K位,具有以下特点:(1)RAM是静态的,从某种意义上说,内存的内容增加了
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The pretuned module: An integrated millimeter wave oscillator A selection system for MNOS capacitor memories A 32 x 9 ECL dual address register using an interleaving cell technique A 16-bit monolithic I3L processor 4-GHz frequency division with GaAs MESFET ICs
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