Analysis of Adiabatic flip-flops for Ultra Low Power Applications

S. Samanta, Rajat Mahapatra, A. K. Mal
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引用次数: 1

Abstract

In this paper we have presented adiabatic flip flops which are used for clocking in digital systems. The clocking scheme using energy recovery technique has already appeared as a successful and promising scheme for limiting power dissipation in ultra low power digital systems. Adiabatic flip flops are the key elements for this type of energy efficient adiabatic clocking scheme. The flip-flops are working in adiabatic principle. Here in this work we have done the simulation and analyze the performance of two basic types of energy recovery flip flops. These are single ended conditional capturing flip-flop and differential conditional capturing flip flop. Both the flip-flops are utilizing energy recovery scheme. For better comparison results we have also used clock gating scheme along with energy recovery technique. Using cadence 180nm technology the simulations are obtained.
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超低功耗绝热触发器分析
本文介绍了一种用于数字系统时钟的绝热触发器。在超低功耗数字系统中,利用能量回收技术的时钟方案已经成为一种成功的、有前途的限制功耗的方案。绝热触发器是这种节能绝热时钟方案的关键元件。人字拖在绝热原理下工作。在本文中,我们对两种基本类型的能量回收触发器进行了仿真和性能分析。它们是单端条件捕获触发器和差分条件捕获触发器。这两款人字拖都采用了能量回收方案。为了得到更好的对比结果,我们还采用了时钟门控方案和能量回收技术。采用cadence 180nm技术进行了仿真。
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