T. Kamada, T. Fukuoka, Y. Nakai, Y. Nakakura, K. Ueda, K. Ota, T. Shiomi, Y. Fukumoto
{"title":"An area effective standard cell based channel decoder LSI for digital satellite TV broadcasting","authors":"T. Kamada, T. Fukuoka, Y. Nakai, Y. Nakakura, K. Ueda, K. Ota, T. Shiomi, Y. Fukumoto","doi":"10.1109/VLSISP.1996.558366","DOIUrl":null,"url":null,"abstract":"A new channel decoder LSI, which will be used in digital satellite TV broadcasting set-top boxes, has been designed. This LSI's functions include AD/DA conversion, QPSK demodulation, Viterbi decoding, frame synchronization, convolutional deinterleaving, Reed-Solomon (RS) decoding, and descrambling. We use a new method for Viterbi decoding called the tracking survivor state information (TSSI) method, which not only reduces power consumption, but also solves the problem of increasing memory size. To reduce the size of the RS decoder circuit, we used a three-stage-pipeline structure as well as designed a new architecture to realize the Euclid algorithm. This device has been fabricated in a 0.35 /spl mu/m 3-metal CMOS standard cell-based process and is composed of 670 K transistors. We describe the TSSI method of the Viterbi decoder and the Reed-Solomon decoder's new 3-stage pipeline architecture.","PeriodicalId":290885,"journal":{"name":"VLSI Signal Processing, IX","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"VLSI Signal Processing, IX","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSISP.1996.558366","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
A new channel decoder LSI, which will be used in digital satellite TV broadcasting set-top boxes, has been designed. This LSI's functions include AD/DA conversion, QPSK demodulation, Viterbi decoding, frame synchronization, convolutional deinterleaving, Reed-Solomon (RS) decoding, and descrambling. We use a new method for Viterbi decoding called the tracking survivor state information (TSSI) method, which not only reduces power consumption, but also solves the problem of increasing memory size. To reduce the size of the RS decoder circuit, we used a three-stage-pipeline structure as well as designed a new architecture to realize the Euclid algorithm. This device has been fabricated in a 0.35 /spl mu/m 3-metal CMOS standard cell-based process and is composed of 670 K transistors. We describe the TSSI method of the Viterbi decoder and the Reed-Solomon decoder's new 3-stage pipeline architecture.