{"title":"Robust Built-In Test of RF ICs Using Envelope Detectors","authors":"Donghoon Han, A. Chatterjee","doi":"10.1109/ATS.2005.95","DOIUrl":null,"url":null,"abstract":"To address growing production test costs, a low-cost built-in test solution for RF circuits is proposed that is robust to process, supply voltage and temperature variations (PVT variations). The test solution consists of measuring the envelope of the output response to a two-tone test stimulus. This is a relatively low frequency signal compared to the nominal frequency of the RF device under test (DUT) and can therefore be sampled using an on-chip ADC. The resulting test response waveform is analyzed using wavelet transforms. The corresponding wavelet coefficients are used to accurately predict the test specification values of the RF DUT in the presence of noise. The proposed test approach has been demonstrated for a 2.4GHz low noise amplifier designed in a 0.18mum CMOS process and shows high prediction accuracy for the test specifications of the DUT in the presence of noise and PVT variations","PeriodicalId":373563,"journal":{"name":"14th Asian Test Symposium (ATS'05)","volume":"112 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"56","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"14th Asian Test Symposium (ATS'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.2005.95","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 56
Abstract
To address growing production test costs, a low-cost built-in test solution for RF circuits is proposed that is robust to process, supply voltage and temperature variations (PVT variations). The test solution consists of measuring the envelope of the output response to a two-tone test stimulus. This is a relatively low frequency signal compared to the nominal frequency of the RF device under test (DUT) and can therefore be sampled using an on-chip ADC. The resulting test response waveform is analyzed using wavelet transforms. The corresponding wavelet coefficients are used to accurately predict the test specification values of the RF DUT in the presence of noise. The proposed test approach has been demonstrated for a 2.4GHz low noise amplifier designed in a 0.18mum CMOS process and shows high prediction accuracy for the test specifications of the DUT in the presence of noise and PVT variations
为了解决不断增长的生产测试成本,提出了一种低成本的射频电路内置测试解决方案,该解决方案对工艺、电源电压和温度变化(PVT变化)具有鲁棒性。测试解决方案包括测量输出响应对双音测试刺激的包络。与被测射频器件(DUT)的标称频率相比,这是一个相对较低的频率信号,因此可以使用片上ADC进行采样。利用小波变换对测试响应波形进行分析。利用相应的小波系数准确地预测了存在噪声的射频被测件的测试规范值。所提出的测试方法已在0.18 μ m CMOS工艺设计的2.4GHz低噪声放大器上进行了验证,并在存在噪声和PVT变化的情况下对被测器件的测试规范显示出较高的预测精度