SEAS: a system for early analysis of SoCs

Abstract

Systems-on-chip (SoC) continue to be very complex to design and verify, despite extensive component reuse. Although reusable components are predesigned and preverified, when they are assembled in an SoC there is no guarantee that the whole system will behave as expected from a performance, cost and integration point of view. In many cases this is because of faulty early design decisions regarding the architecture, core selection, floorplanning, etc. This paper presents a system for early analysis of SoCs which helps designers make early decisions regarding performance, area, timing and power; and allows them to quickly evaluate cross-domain effects, such as the effect that an architectural decision may have on the performance and chip area.