{"title":"A top-down parsing co-processor for compilation","authors":"Y. Chu, K. Itano","doi":"10.1109/HICSS.1989.47182","DOIUrl":null,"url":null,"abstract":"The architecture of a top-down parsing coprocessor is presented. This processor aims at fast compilation for programming languages in LL(1) grammar. It accepts a stream of tokens from the lexical coprocessor and produces a stream of codes representing semantic action to be taken by the CPU. The coprocessor organization has a pipeline and two register stacks. The pipeline has four stages during which the production rule for each input token is checked and the semantic rules are selected. One register stack handles the production rules, while the other register stack handles the semantic rules. Only a small set of coprocessor instructions is needed for writing the parsing code and the size of the code is less than ten coprocessor instructions. It is estimated that the parsing coprocessor could produce the codes for possible semantic action at an average rate of 2 million codes per second.<<ETX>>","PeriodicalId":300182,"journal":{"name":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HICSS.1989.47182","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

The architecture of a top-down parsing coprocessor is presented. This processor aims at fast compilation for programming languages in LL(1) grammar. It accepts a stream of tokens from the lexical coprocessor and produces a stream of codes representing semantic action to be taken by the CPU. The coprocessor organization has a pipeline and two register stacks. The pipeline has four stages during which the production rule for each input token is checked and the semantic rules are selected. One register stack handles the production rules, while the other register stack handles the semantic rules. Only a small set of coprocessor instructions is needed for writing the parsing code and the size of the code is less than ten coprocessor instructions. It is estimated that the parsing coprocessor could produce the codes for possible semantic action at an average rate of 2 million codes per second.<>
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
用于编译的自顶向下解析协处理器
提出了一种自顶向下解析协处理器的结构。该处理器旨在对LL(1)语法的编程语言进行快速编译。它接受来自词法协处理器的令牌流,并生成表示CPU要采取的语义操作的代码流。协处理器组织有一个管道和两个寄存器栈。该管道有四个阶段,在此期间检查每个输入令牌的产生规则并选择语义规则。一个寄存器栈处理生产规则,而另一个寄存器栈处理语义规则。编写解析代码只需要一小组协处理器指令,代码的大小小于10个协处理器指令。据估计,解析协处理器可以以平均每秒200万个代码的速度生成可能的语义动作的代码。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Instruction set architecture of an efficient pipelined dataflow architecture An integrated CAD system for algorithm-specific IC design A massive memory supercomputer Extended ASLM-a reconfigurable database machine NS32532: case study in general-purpose microprocessor design tradeoffs
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1