Device for Protecting High Frequency and High Data Rate Interface Applications in FinFET Process Technologies

S. Parthasarathy, R. Shumovich, J. Salcedo, Roxann Broughton-Blanchard, J. Hajjar
{"title":"Device for Protecting High Frequency and High Data Rate Interface Applications in FinFET Process Technologies","authors":"S. Parthasarathy, R. Shumovich, J. Salcedo, Roxann Broughton-Blanchard, J. Hajjar","doi":"10.1109/RFIC54546.2022.9863162","DOIUrl":null,"url":null,"abstract":"The relatively poor ESD robustness of many RF ports is a direct result of the performance degradation introduced by traditional ESD diodes. The later limits the amount of ESD protection that can be tolerated in RF applications. This paper introduces a ground-referenced low capacitance and highly linear Silicon Controlled Rectifiers (SCR) topology designed in l6nm CMOS FinFET process technology. The device presented in this work is employed to protect RF ports with asymmetrical signal swings in the range of + 3.0V /-l.0V operating to 20 GHz with a 3rd order linearity specification requirement of −75dBc or greater.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"341 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC54546.2022.9863162","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

The relatively poor ESD robustness of many RF ports is a direct result of the performance degradation introduced by traditional ESD diodes. The later limits the amount of ESD protection that can be tolerated in RF applications. This paper introduces a ground-referenced low capacitance and highly linear Silicon Controlled Rectifiers (SCR) topology designed in l6nm CMOS FinFET process technology. The device presented in this work is employed to protect RF ports with asymmetrical signal swings in the range of + 3.0V /-l.0V operating to 20 GHz with a 3rd order linearity specification requirement of −75dBc or greater.
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在FinFET工艺技术中保护高频和高数据速率接口应用的装置
许多RF端口相对较差的ESD稳健性是传统ESD二极管引入的性能下降的直接结果。后者限制了射频应用中可容忍的ESD保护的数量。本文介绍了一种采用16纳米CMOS FinFET工艺设计的低电容、高线性可控硅整流器(SCR)拓扑结构。本文提出的器件用于保护+ 3.0V /-l范围内信号波动不对称的射频端口。0V工作至20ghz,三阶线性度规格要求为- 75dBc或更高。
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