Sufficient conditions for correct gate-level speed-independent circuits

P. Beerel, J. Burch, T. Meng
{"title":"Sufficient conditions for correct gate-level speed-independent circuits","authors":"P. Beerel, J. Burch, T. Meng","doi":"10.1109/ASYNC.1994.656284","DOIUrl":null,"url":null,"abstract":"We describe sufficient conditions for the correctness of speed-independent asynchronous circuits. The circuit specifications considered are determinate, allowing input choice but not output choice (arbitration). The circuit implementations considered are networks of single-output basic gates. A circuit is defined to be correct if it is hazard-free and complex-gate equivalent to its specification. We show that a circuit is hazard-free if and only if all of its signals are monotonic and acknowledged. This result provides a useful tool for formal reasoning about the correctness of circuits and synthesis techniques. Cubes that approximate sets of reachable circuit states can be used to give sufficient conditions for monotonicity and acknowledgement. These sufficient conditions are the basis of efficient synthesis and verification algorithms.","PeriodicalId":114048,"journal":{"name":"Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems","volume":"6 11","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASYNC.1994.656284","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16

Abstract

We describe sufficient conditions for the correctness of speed-independent asynchronous circuits. The circuit specifications considered are determinate, allowing input choice but not output choice (arbitration). The circuit implementations considered are networks of single-output basic gates. A circuit is defined to be correct if it is hazard-free and complex-gate equivalent to its specification. We show that a circuit is hazard-free if and only if all of its signals are monotonic and acknowledged. This result provides a useful tool for formal reasoning about the correctness of circuits and synthesis techniques. Cubes that approximate sets of reachable circuit states can be used to give sufficient conditions for monotonicity and acknowledgement. These sufficient conditions are the basis of efficient synthesis and verification algorithms.
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正确的门级速度无关电路的充分条件
给出了速度无关异步电路正确性的充分条件。考虑的电路规格是确定的,允许输入选择,但不允许输出选择(仲裁)。考虑的电路实现是单输出基本门的网络。如果电路是无危险的,并且复杂栅极与它的规格相等,那么它就被定义为是正确的。我们证明,当且仅当电路的所有信号都是单调且被确认时,电路是无害的。这一结果为电路和合成技术的正确性的形式化推理提供了一个有用的工具。近似可达电路状态集的立方体可以用来给出单调性和确认性的充分条件。这些充分条件是高效合成和验证算法的基础。
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An asynchronous pipelined lattice structure filter Verification of the speed-independent circuits by STG unfoldings Designing asynchronous circuits from behavioural specifications with internal conflicts Tools for validating asynchronous digital circuits Sufficient conditions for correct gate-level speed-independent circuits
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