{"title":"Sufficient conditions for correct gate-level speed-independent circuits","authors":"P. Beerel, J. Burch, T. Meng","doi":"10.1109/ASYNC.1994.656284","DOIUrl":null,"url":null,"abstract":"We describe sufficient conditions for the correctness of speed-independent asynchronous circuits. The circuit specifications considered are determinate, allowing input choice but not output choice (arbitration). The circuit implementations considered are networks of single-output basic gates. A circuit is defined to be correct if it is hazard-free and complex-gate equivalent to its specification. We show that a circuit is hazard-free if and only if all of its signals are monotonic and acknowledged. This result provides a useful tool for formal reasoning about the correctness of circuits and synthesis techniques. Cubes that approximate sets of reachable circuit states can be used to give sufficient conditions for monotonicity and acknowledgement. These sufficient conditions are the basis of efficient synthesis and verification algorithms.","PeriodicalId":114048,"journal":{"name":"Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems","volume":"6 11","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASYNC.1994.656284","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16
Abstract
We describe sufficient conditions for the correctness of speed-independent asynchronous circuits. The circuit specifications considered are determinate, allowing input choice but not output choice (arbitration). The circuit implementations considered are networks of single-output basic gates. A circuit is defined to be correct if it is hazard-free and complex-gate equivalent to its specification. We show that a circuit is hazard-free if and only if all of its signals are monotonic and acknowledged. This result provides a useful tool for formal reasoning about the correctness of circuits and synthesis techniques. Cubes that approximate sets of reachable circuit states can be used to give sufficient conditions for monotonicity and acknowledgement. These sufficient conditions are the basis of efficient synthesis and verification algorithms.