H. Lin, H. Lin, R. Chang, S.-W. Chen, Chih-Yuan Liao, C.-H. Wu
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引用次数: 14
Abstract
A high-speed highly pipelined dual-input FFT/IFFT architecture efficiently sharing hardware is proposed for MIMO WLAN communication systems. It reduces the hardware complexity to enhance the throughput of the FFT/IFFT processor to be applied to IEEE 802.11n WLAN system or beyond. The area and the power consumption of the proposed design is 0.66mm2 and 97mW at 200MHz operation frequency with dual input/output 64-point FFT/IFFT sequences using TSMC 0.18mum 1P6M technology at supply voltage of 1.8V
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