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Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.最新文献

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1/f noise corner modeling 1/f噪声角建模
W.C. Pflanzi, E. Seebacher, Z. Huszka
This paper presents a new accurate method for generation of 1/f noise worst cases (WC) based on statistical measurement data. This is implemented in existing state of the art design simulators with a scaled flicker noise model for CMOS. Verification is shown on a noise sensitive analog circuitry as a benchmark for robust flicker noise design. The methodology presented can easily be extended to other devices like BJTs or any other
本文提出了一种基于统计测量数据的1/f噪声最坏情况(WC)精确生成方法。这是在现有的艺术设计模拟器与CMOS缩放闪烁噪声模型中实现的。在噪声敏感模拟电路上进行了验证,作为鲁棒闪烁噪声设计的基准。所提出的方法可以很容易地扩展到其他设备,如bjt或任何其他设备
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引用次数: 1
Reliable Iris Localization Method With Application To Iris Recognition In Near Infrared Light 可靠的虹膜定位方法及其在近红外光虹膜识别中的应用
K. Grabowski, W. Sankowski, M. Zubert, M. Napieralska
Iris recognition is accepted as one of the best biometric method. Implementing this method to the practical system requires the special preprocessing where the iris localization plays a crucial role. Iris localization consists of finding the iris boundaries as well as eyelids. In this paper a simple iris localization algorithm is proposed based on iris image segmentation with histogram analysis. Proposed solution was applied for images taken under near infrared light
虹膜识别是公认的最好的生物识别方法之一。将该方法应用到实际系统中需要进行特殊的预处理,其中虹膜定位起着至关重要的作用。虹膜定位包括寻找虹膜边界和眼睑。本文提出了一种基于直方图分析分割虹膜图像的简单虹膜定位算法。将该解决方案应用于近红外光下的图像
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引用次数: 29
Digital Programmable gMC-filter In 120nm CMSO Technology 数字可编程gmc -滤波器采用120nm CMSO技术
R. Kolm, H. Zimermann
Architecture of a digital programmable gmC-filter with a linearized operational transconductance amplifier (OTA) is proposed. The gain was varied by 2dB in 4 steps, the cut-off-frequency between 250MHz and 350MHz. Experimental results in a standard 120nm CMOS technology are presented. With this topology the measured harmonic distortion of this filter is -44dB for a 400mV peak-to-peak differential output signal
提出了一种带线性化运算跨导放大器的数字可编程gmc滤波器的结构。增益在4步中变化2dB,截止频率在250MHz和350MHz之间。给出了在标准120nm CMOS技术下的实验结果。在这种拓扑下,对于400mV的峰对峰差分输出信号,该滤波器的测量谐波失真为-44dB
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引用次数: 2
Silicon carbide devices and processes - present status and future pers 碳化硅器件和工艺的现状与未来
M. Ostling, H. Lee, M. Domeij, C. Zetterling
Silicon carbide electronic devices are already commercially available in a few application areas such as high voltage rectifiers and emerging RF power amplifiers. Over the past 15 years a very rapid progress of both materials and device quality has been seen and is very encouraging for the near future application market. Prototype devices show amazing improvement each year in all device categories as well as a markedly improved wafer quality. However, materials defect issues are still limiting economically viable production of large area devices with high yield. In this paper a thorough review of progress in SiC device process technology and presents the state-of-the art SiC devices as well as new application areas such as ferroelectric field effect transistors
碳化硅电子器件已经在一些应用领域商业化,如高压整流器和新兴的射频功率放大器。在过去的15年里,材料和设备质量都取得了非常迅速的进步,这对不久的将来的应用市场来说是非常令人鼓舞的。原型器件每年在所有器件类别中都有惊人的改进,晶圆质量也有显著提高。然而,材料缺陷问题仍然限制了经济可行的大面积高成品率器件的生产。本文综述了碳化硅器件工艺技术的进展,介绍了碳化硅器件的最新进展以及铁电场效应晶体管等新的应用领域
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引用次数: 3
Processing Time And Cross Capacitive Coupling For A Winner Take All Circuit 赢家通吃电路的处理时间和交叉电容耦合
R. Costea, C. Marinov
The paper deals with an analog w(inner)-t(ake)-a(ll) network where two input wires are capacitively coupled. The difference between processing times with and without coupling is evaluated by its upper bound. Thus, a performance criterion explicitly expressed as a function of circuit and processing list parameters is obtained
本文讨论了一个模拟w(内)-t(外)-a(外)网络,其中两个输入线是电容耦合的。有耦合和没有耦合的处理时间之间的差异由其上界计算。因此,得到了一个明确表示为电路和加工表参数函数的性能准则
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引用次数: 1
Characterization And Simulation Of Silicon Power Devices Up To Very High Temperatures 极高温度下硅功率器件的特性与仿真
P. Borthen, G. Wachutka
We investigated and calibrated physically-based high-temperature device models on the basis of measurements and simulations of industrial power MOSFETs and non-punch through (NPT) 600V IGBTs (both from Infineon AG) in a temperature range from room temperature up to 750 K
我们在测量和模拟工业功率mosfet和non-punch through (NPT) 600V igbt(均来自英飞凌AG)的基础上,研究并校准了基于物理的高温器件模型,温度范围从室温到750 K
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引用次数: 1
Web Based System For Archive And Management Theses 基于Web的论文归档与管理系统
J. Wisnicka, M. Wójtowski, K. Slusarczyk
The subject of the article is an application which stores the information about defences of master and bachelor theses, allows reviewing and convenient managing them. This application was implemented with use of Apache Struts
本文的课题是一个存储硕士和学士学位论文答辩信息,便于查阅和管理的应用程序。该应用程序是使用Apache Struts实现的
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引用次数: 1
Fully Differential Rail-to-rail Input Opamp With Novel Constant-transconductance Control In 120nm CMOS Technology 采用120nm CMOS技术的新型恒跨导控制的全差分轨对轨输入运放
W. Yan, H. Zimmermann
A fully differential operational amplifier featured with rail-to-rail input and output performance, realized by a novel method of constant small- and large-signal behavior control as well as a new symmetrical differential class-AB output is proposed. The small-signal deviation is suppressed within only 1.6%, which is the best result achieved among all the constant behavior rail-to-rail input-stage designs. With suitable compensation, the opamp is able to drive heavy ohmic load down to 100ohm or capacitive load higher than 50pF. Also the total harmonic distortion is reduced owing to the symmetrical push-pull structure for the output stage. With a 1.5V power supply and a capacitive load of 10pF, the low-frequency gain and unity-gain bandwidth of the opamp are 77dB and 4.7MHz, respectively. The chip was fabricated in 120nm digital CMOS technology
提出了一种具有轨对轨输入输出性能的全差分运算放大器,该放大器采用一种新的恒小、恒大信号行为控制方法和一种新的对称差分ab类输出。小信号偏差仅被抑制在1.6%以内,是所有恒行为轨对轨输入级设计中效果最好的。通过适当的补偿,运放能够将高欧姆负载驱动到100欧姆或高于50pF的容性负载。由于输出级采用对称推挽结构,减少了总谐波失真。在1.5V电源和10pF容性负载下,该运放的低频增益和单位增益带宽分别为77dB和4.7MHz。该芯片采用120nm数字CMOS技术制造
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引用次数: 2
Digital Method Of Phase Shift Measuring 相移测量的数字方法
R. Ivantsiv, U. Maricutsa, T. Sviridova, M. Lobur
The devices used for measuring the phase shift have been reviewed in this article. The measurement fault of the phase shift with the value 3deg for the frequency 30 kHz at the quantization frequency value 100 mHz has been defined; the structural scheme of the phase meter with frequency multiplier for 36 has been suggested
本文综述了用于测量相移的器件。定义了在量化频率值100 mHz下,频率为30 kHz时相移值为3度的测量故障;提出了36倍频相位计的结构方案
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引用次数: 1
Hardware Realization Of The MPEG-7 Edge Histogram Descriptor MPEG-7边缘直方图描述符的硬件实现
R. Kapela, A. Rybarczyk, P. Sniatala, R. Rudnicki
The paper presents hardware implementation of the MPEG-7 edge histogram descriptor. The testing circuit was described using VHDL language and synthesized into FPGA. The RC1000 board with a Xilinx Virtex V1000 FPGA was chosen as the target platform. Experimental results of the descriptor efficiency are presented too
本文给出了MPEG-7边缘直方图描述符的硬件实现。用VHDL语言对测试电路进行了描述,并将其合成到FPGA中。采用Xilinx Virtex V1000 FPGA的RC1000单板作为目标平台。给出了描述子效率的实验结果
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引用次数: 8
期刊
Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.
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