R. Ben Yishay, B. Sheinman, R. Carmon, J. Vovnoboy, O. Katz, D. Elad
{"title":"High Linearity 57–66 GHz SiGe Receiver for Outdoor Point-to-Point Communication","authors":"R. Ben Yishay, B. Sheinman, R. Carmon, J. Vovnoboy, O. Katz, D. Elad","doi":"10.23919/EUMIC.2018.8539956","DOIUrl":null,"url":null,"abstract":"Fully integrated receiver in a superhetrodyne architecture covering the entire 60 GHz frequency range (57–66 GHz) was designed and fabricated in 0.12 μm SiGe technology. The receiver chip includes an image-reject low-noise amplifier (LNA), RF-to-IF mixer, RF variable attenuator, IF variable gain amplifier, quadrature IF-to-baseband de-modulators, tunable baseband filter, phase-locked loop (PLL), and x3 frequency multiplier. The receiver chip achieve maximum gain of 65 dB, 5 dB minimum noise figure, better than 2 dBm IIP3 at high linearity mode, with >75 dB dynamic range, and consumes 630 mW.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"13 2","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/EUMIC.2018.8539956","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Fully integrated receiver in a superhetrodyne architecture covering the entire 60 GHz frequency range (57–66 GHz) was designed and fabricated in 0.12 μm SiGe technology. The receiver chip includes an image-reject low-noise amplifier (LNA), RF-to-IF mixer, RF variable attenuator, IF variable gain amplifier, quadrature IF-to-baseband de-modulators, tunable baseband filter, phase-locked loop (PLL), and x3 frequency multiplier. The receiver chip achieve maximum gain of 65 dB, 5 dB minimum noise figure, better than 2 dBm IIP3 at high linearity mode, with >75 dB dynamic range, and consumes 630 mW.