A 5 to 10.5 GHz Low-power Wideband I/Q Transmitter with Integrated Current-Mode Logic Frequency Divider

H. Chiou, Wei-Min Sung
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引用次数: 1

Abstract

This paper presents a 5-10.5 GHz wideband fully-integrated I/Q transmitter in tsmc™ 90-nm CMOS technology. A current-mode passive mixer was adopted to enhance the linearity and low-power performance. The transmitter also integrated current-mode logic (CML) frequency divider (FD) to generate I/Q signals at LO-port. The I/Q signals were directly combined by using high-Q top-metal lines. An inductively coupled resonator (ICR) wideband output matching network was used to transform balance to unbalance output signal in RF drive-amplifier. The proposed transmitter achieves a 3-dB bandwidth from 5 to 10.5 GHz, a conversion gain of 12.9 dB, an output P1dB of -4.17 dBm, an output IP3 of 16.47 dBm, a carrier suppression of 30.02 dBc and a sideband suppression of 39.62 dBc under an LO power of 14 dBm at the center frequency of 8 GHz. The chip consumed dc power of 66.36 mW. The chip dimensions, including all RF and DC pads, are 1.25 × 1.1 mm2.
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一种5至10.5 GHz低功耗宽带I/Q发射机,集成电流模式逻辑分频器
本文提出了一种采用tsmc™90纳米CMOS技术的5-10.5 GHz宽带全集成I/Q发射机。采用电流型无源混频器来提高线性度和低功耗性能。发射机还集成了电流模式逻辑(CML)分频器(FD),在lo端口产生I/Q信号。I/Q信号通过使用高Q顶部金属线直接组合。采用电感耦合谐振器(ICR)宽带输出匹配网络将射频驱动放大器的平衡输出信号转换为不平衡输出信号。该发射机在中心频率为8 GHz,本端功率为14 dBm时,带宽为5 ~ 10.5 GHz,增益为12.9 dB,输出P1dB为-4.17 dBm,输出IP3为16.47 dBm,载波抑制为30.02 dBc,边带抑制为39.62 dBc。芯片的直流功耗为66.36 mW。芯片尺寸,包括所有RF和DC焊盘,为1.25 × 1.1 mm2。
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