An embedded processor for integrated navigation receiver

Abstract

In this paper, we present the design considerations of an embedded signal processor for application in integrated radio navigation. The navigation receiver consists of four different subsystems: GPS, OMEGA, Loran-C and MLS. Due to the complementary features of these subsystems, the combined receiver shows improved performance compared to the individual subsystems. We show how such a multifunction receiver can be built around a single high performance application-specific processor, which consists of both general-purpose and application-specific functional units. The processor customization into these functional units is accomplished through algorithm timing analysis using the MOVE processor development framework. A Loran-C baseband processor design is presented as a case-study. We present a new time-distributed FIR filter algorithm which reduces the computational complexity and hardware cost of the Loran-C subsystem.