{"title":"Modeling and analysis of read (RD) disturb in 1T-1STT MTJ memory bits","authors":"A. Raychowdhury, D. Somasekhar, T. Karnik, V. De","doi":"10.1109/DRC.2010.5551946","DOIUrl":null,"url":null,"abstract":"The paper presents a RD disturb model study of STT-MTJ memory bits. It shows that high-current short-pulsed RD may cause failure under hammer conditions. Analytical models for such have been developed and validated against numerical simulations.","PeriodicalId":396875,"journal":{"name":"68th Device Research Conference","volume":"74 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"68th Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2010.5551946","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
The paper presents a RD disturb model study of STT-MTJ memory bits. It shows that high-current short-pulsed RD may cause failure under hammer conditions. Analytical models for such have been developed and validated against numerical simulations.
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