Minimizing power dissipation of cellular phones

Abstract

Power dissipation can be addressed at three different levels: system, architecture, and circuit. The system has to be designed to allow for efficient paging to allow the phone to sleep for long periods, and the access scheme and modulation method have a large impact on circuit performance. A proper architecture and circuit partitioning has to be chosen: off-chip devices offer lower current consumption, but signal routing may require high power levels. At the circuit level, optimized supply voltages and power-down modes are important for digital circuits. Dynamic-bias analog circuits may adapt to the signal and interference situation.