A Compact SPDT Switch in 0.18um CMOS Process With High Linearity and Low Insertion Loss

M. Teshiba, G. Sakamoto, T. Cisco
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引用次数: 8

Abstract

A compact CMOS SPDT switch fabricated in 0.18 mum BiCMOS technology has been successfully demonstrated at X-Ku-band. The fully integrated chip exhibits a low insertion loss of 1.9 dB and an isolation of 22.5 dB at 17 GHz. By reverse biasing the source/drain (S/D) diode junctions, the switch achieves a PldB of 21 dBm and TOI greater than 30 dB in a very compact structure. The small footprint, along with the performance being comparable to GaAs switches, makes the switch a very attractive, low cost building block circuit for MMIC designs.
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一种0.18um CMOS制程的紧凑SPDT开关,具有高线性度和低插入损耗
采用0.18 μ m BiCMOS技术制作的紧凑CMOS SPDT开关在x - ku波段成功演示。完全集成的芯片在17 GHz时具有1.9 dB的低插入损耗和22.5 dB的隔离。通过反向偏置源/漏极(S/D)二极管结,该开关在非常紧凑的结构中实现了21 dBm的PldB和大于30 dB的TOI。占地面积小,性能可与GaAs开关相媲美,使该开关成为非常有吸引力的低成本MMIC设计模块电路。
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