Detection of test Patterns with Unreachable States through Efficient Inductive-Invariant Identification

M. Fujita
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引用次数: 4

Abstract

When testing sequential circuits with scan chains, the test patterns are generated on their combinational parts assuming that all value combinations can be used for flip-flops. On the other hands, if target circuits have initial values for flip-flops, it is well known that the sets of reachable states may be much smaller than the entire state space, and there are lots of value combinations for flip-flops which can never be realized in the normal operations starting with the initial states. Therefore, there are possibilities that the values used for the flip-flops in the set of test patterns cannot be realized through normal operations, and there may be over testing issues, as some of the detectable faults by the given test patterns are actually non-detectable under the normal operations. In this paper, we first give a quick way to generate super sets of reachable states on the values of the given subset of flipflops based on QBF (Quantified Boolean Formula) formulation. By limiting the numbers of flipflops in the subset to small, such as 6 or so, we can generate an inductive-invariant for the values of the given subset of flipflops in less than a second for any ISCAS89 circuits. The generated invariant corresponds to a superset of reachable states assuming that the initial state is the one where all flipflop values are zero (or some specific values), and the complement of an invariant is a subset of unreachable states. It is shown that close to the half of a typical set of compacted test patterns for stuck-at (single and multiple) faults on ISCAS89 circuits are using the values from the computed unreachable states, i.e., possibly over testing the circuits, if the initial state is the all zero state. Then we generate the sets of test patterns for stuck-at faults (single and multiple) which never use the values inside the subset of unreachable states. The resulting sets of test patterns become several times larger than a compacted test patterns without considering unreachable states.
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基于高效归纳不变识别的不可达状态测试模式检测
当测试具有扫描链的顺序电路时,假设所有的值组合都可以用于触发器,则在其组合部分上生成测试模式。另一方面,如果目标电路具有触发器的初始值,则已知可达状态集可能远远小于整个状态空间,并且存在许多从初始状态开始的正常操作无法实现的触发器值组合。因此,有可能在测试模式集合中用于触发器的值不能通过正常操作实现,并且可能存在过度测试问题,因为通过给定的测试模式可以检测到的一些故障实际上在正常操作下是无法检测到的。本文首先给出了一种基于QBF (Quantified Boolean Formula)公式在给定触发器子集的值上快速生成可达状态超集的方法。通过限制子集中触发器的数量,例如6个左右,对于任何ISCAS89电路,我们可以在不到一秒的时间内为给定触发器子集的值生成一个电感不变量。生成的不变量对应于可达状态的超集,假设初始状态是所有触发器值为零(或某些特定值)的状态,并且不变量的补是不可达状态的子集。结果表明,ISCAS89电路上的卡滞(单个和多个)故障的典型压缩测试模式集的近一半使用的是计算出的不可达状态的值,即,如果初始状态为全零状态,可能会对电路进行过度测试。然后,我们为卡在故障(单个和多个)生成测试模式集,这些模式集从不使用不可达状态子集内的值。在不考虑不可达状态的情况下,测试模式的结果集比压缩测试模式大几倍。
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