{"title":"Design of one-channel embedded Network Video Server","authors":"Shurong Chen, Kai-yu Xu, Haiyun Gu","doi":"10.1109/INDIN.2008.4618239","DOIUrl":null,"url":null,"abstract":"As one of critical devices of digital video surveillance system, Network Video Server (NVS) plays an important role by providing rich functionalities and high performances to better meet userspsila requirements. With rapid development of Digital Signal Processing (DSP) technology, performing high-quality MPEG4/H.264 video image codec in one DSP chip becomes possible. However, a majority of schemes of NVS are implemented via CPU and specific Audio/Video (AN) codec or DSP chip, which has distinct disadvantages in cost and product size. This paper presents design architecture for one-channel embedded NVS, which operates under dasiaRSIC plus DSPpsila mode of ADSP-BF561 chip with dual cores, and realizes video image coding based on MPEG4 with full D1 resolution, network transmitting, bidirectional speaking, and remote control functions, etc. Implementation methods of key modules are discussed, and performance indicators such as image quality over IP network and network delays are also verified in the end.","PeriodicalId":112553,"journal":{"name":"2008 6th IEEE International Conference on Industrial Informatics","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 6th IEEE International Conference on Industrial Informatics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INDIN.2008.4618239","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
As one of critical devices of digital video surveillance system, Network Video Server (NVS) plays an important role by providing rich functionalities and high performances to better meet userspsila requirements. With rapid development of Digital Signal Processing (DSP) technology, performing high-quality MPEG4/H.264 video image codec in one DSP chip becomes possible. However, a majority of schemes of NVS are implemented via CPU and specific Audio/Video (AN) codec or DSP chip, which has distinct disadvantages in cost and product size. This paper presents design architecture for one-channel embedded NVS, which operates under dasiaRSIC plus DSPpsila mode of ADSP-BF561 chip with dual cores, and realizes video image coding based on MPEG4 with full D1 resolution, network transmitting, bidirectional speaking, and remote control functions, etc. Implementation methods of key modules are discussed, and performance indicators such as image quality over IP network and network delays are also verified in the end.
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