Scaling perspectives of ULV microcontroller cores to 28nm UTBB FDSOI CMOS

G. de Streel, D. Bol
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引用次数: 5

Abstract

Short-channel effects and variability in bulk technologies limit the interest of CMOS technology scaling for ultra-low-voltage (ULV) logic below 65nm because of the resulting penalty in the energy efficiency. FDSOI has already been predicted to be a good candidate to keep an excellent energy efficiency while increasing speed at ULV. In this paper, we confirm this result by synthesis results of microcontrollers at 0.35V. We show that the use of a mix of overdrive forward back biasing (FBB) voltages in 28nm FDSOI further improves the energy efficiency. Compare to bulk 65nm CMOS, we were able to reduce the energy per cycle by 64% or increase the frequency of operation by 7x while maintaining energy per operation below 3μW/MHz over a wide frequency range.
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uv微控制器核心到28nm UTBB FDSOI CMOS的缩放前景
短通道效应和体技术的可变性限制了CMOS技术在65纳米以下的超低电压(ULV)逻辑上的扩展,因为这会导致能量效率的降低。FDSOI已经被预测为保持极好的能源效率,同时提高超低速的良好候选者。在本文中,我们通过在0.35V下的微控制器的合成结果证实了这一结果。我们表明,在28nm FDSOI中使用混合超速正偏置(FBB)电压进一步提高了能量效率。与大块65nm CMOS相比,我们能够将每个周期的能量降低64%或将工作频率提高7倍,同时在较宽的频率范围内将每次操作的能量保持在3μW/MHz以下。
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