M. Muraguchi, M. Nakatsugawa, H. Hayashi, M. Aikawa
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引用次数: 20
Abstract
An ultra low power consumption amplifier chip set for the 1.9 GHz Japanese Personal Handy-phone System (PHS) is presented. The chip set includes a linear power amplifier, a driver amplifier, and an LO switch amplifier. These amplifiers use Cascode FETs that provide low phase distortion, high gain, and low current operation. The power amplifier uses a new concept of a self-phase distortion compensation to achieve a record performance of 45% power added efficiency with sufficient linearity. The driver amplifier has a gain of 13.5 dB with a low power consumption of 3 mW (1 mA, 3 V). The LO switch amplifier is a new MMIC that has both switch and buffer amplifier functions. The switch amplifier has an output power of 3 dBm, a forward gain of 15 dB, and a reverse isolation of 35 dB with a low power consumption of 6 mW (2 mA, 3 V).<>
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