M. Matias, J. P. Cunha, P. A. D. Fabbro, D. Mioni, W. Prodanov, M. Pessatti, B. Leite, A. Mariano
{"title":"A comparison of high-efficiency UHF RFID rectifiers using internal voltage compensation and zero-threshold-voltage MOSFETs","authors":"M. Matias, J. P. Cunha, P. A. D. Fabbro, D. Mioni, W. Prodanov, M. Pessatti, B. Leite, A. Mariano","doi":"10.1109/LASCAS.2014.6820301","DOIUrl":null,"url":null,"abstract":"This paper discusses and compares the design of two high-efficiency 4-stage voltage-doubler UHF RFID rectifier operating at 915 MHz. The first rectifier uses conventional 180-nm CMOS transistors applying a technique of internal cancellation in order to compensate the high value of their threshold voltages (Vth). The second proposed rectifier uses zero-Vth transistors, which are available in a 130 nm CMOS process, eliminating the need for compensation circuitry. The circuit implementing Vth compensation occupies a 0.025 mm2 area, achieving a -12 dBm input sensitivity and a 18% power conversion efficiency (PCE) when supplying a 1.2 V output voltage and a 10 μA load current. For the same load conditions, the circuit including zero-Vth transistors presents a reduced area occupation (0.013 mm2), while providing both improved sensitivity (-14.3 dBm) and a 33% PCE at this sensitivity.","PeriodicalId":235336,"journal":{"name":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LASCAS.2014.6820301","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17
Abstract
This paper discusses and compares the design of two high-efficiency 4-stage voltage-doubler UHF RFID rectifier operating at 915 MHz. The first rectifier uses conventional 180-nm CMOS transistors applying a technique of internal cancellation in order to compensate the high value of their threshold voltages (Vth). The second proposed rectifier uses zero-Vth transistors, which are available in a 130 nm CMOS process, eliminating the need for compensation circuitry. The circuit implementing Vth compensation occupies a 0.025 mm2 area, achieving a -12 dBm input sensitivity and a 18% power conversion efficiency (PCE) when supplying a 1.2 V output voltage and a 10 μA load current. For the same load conditions, the circuit including zero-Vth transistors presents a reduced area occupation (0.013 mm2), while providing both improved sensitivity (-14.3 dBm) and a 33% PCE at this sensitivity.