Pub Date : 2014-05-26DOI: 10.1109/LASCAS.2014.6820303
S. Sheikholeslam, C. Grecu, A. Ivanov
In this work, we demonstrate a novel tri-state device based on gated quantum-dot cellular automata. This device can be physically implemented by employing metal contacts and molecular quantum dot cells. Our simulations based on a simplified but realistic model show that the current-voltage transfer function of this device has good state separation, which indicates that this device would be feasible for implementation. We introduced a new, tri-state Hamiltonian, that reduces the amount of simulations when used in large-scale systems with thousands or millions of such devices.
{"title":"A novel tri-state device implemented with a metal gated QCA","authors":"S. Sheikholeslam, C. Grecu, A. Ivanov","doi":"10.1109/LASCAS.2014.6820303","DOIUrl":"https://doi.org/10.1109/LASCAS.2014.6820303","url":null,"abstract":"In this work, we demonstrate a novel tri-state device based on gated quantum-dot cellular automata. This device can be physically implemented by employing metal contacts and molecular quantum dot cells. Our simulations based on a simplified but realistic model show that the current-voltage transfer function of this device has good state separation, which indicates that this device would be feasible for implementation. We introduced a new, tri-state Hamiltonian, that reduces the amount of simulations when used in large-scale systems with thousands or millions of such devices.","PeriodicalId":235336,"journal":{"name":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115502749","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-26DOI: 10.1109/LASCAS.2014.6820258
Catalina Munoz Morales, G. S. Eslava
This paper presents the design and performance analysis of linear and non-linear channel prediction algorithms used in 4G communication systems. The linear prediction algorithms are based in Autoregressive (AR) model and Kalman filter; the non-linear prediction algorithms are based on neural network (NN) in a time delay and recurrent (RNN) configuration. The design and validation of the algorithms were made using a MIMO-OFDM system described using SystemC. Performance metrics such as latency and Mean Square Error (MSE) are used for comparison. Results indicate that even though latency increases in the system, with both linear and non-linear prediction, non-linear algorithms show lower MSE when trained properly. Configuration parameters of the algorithms are key to find a relationship between latency and MSE.
{"title":"Linear and non-linear channel prediction performance for a MIMO-OFDM system","authors":"Catalina Munoz Morales, G. S. Eslava","doi":"10.1109/LASCAS.2014.6820258","DOIUrl":"https://doi.org/10.1109/LASCAS.2014.6820258","url":null,"abstract":"This paper presents the design and performance analysis of linear and non-linear channel prediction algorithms used in 4G communication systems. The linear prediction algorithms are based in Autoregressive (AR) model and Kalman filter; the non-linear prediction algorithms are based on neural network (NN) in a time delay and recurrent (RNN) configuration. The design and validation of the algorithms were made using a MIMO-OFDM system described using SystemC. Performance metrics such as latency and Mean Square Error (MSE) are used for comparison. Results indicate that even though latency increases in the system, with both linear and non-linear prediction, non-linear algorithms show lower MSE when trained properly. Configuration parameters of the algorithms are key to find a relationship between latency and MSE.","PeriodicalId":235336,"journal":{"name":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125571681","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-26DOI: 10.1109/LASCAS.2014.6820249
J. Viola, E. Baethge, A. Berzoy, J. Restrepo, F. Quizhpi
Two methods for the estimation of the DC voltages in the capacitors associated to the DC buses in a cascaded multilevel converter topology are analyzed. To reduce the number of voltage sensors, available information from inductor currents and line voltage sensors is used as input to a discrete time model of the converter. Additionally, information from the switching state of each converter's cell is used allowing an estimation of voltages in each capacitor. Both methods are developed, implemented and simulated for a 9 level three-phase cascaded multilevel converter when it is operated as a controlled rectifier at unity power factor. The analyzed methods have low computational cost allowing its implementation in real time.
{"title":"DC voltage estimation methods for multilevel converter operating with reduced number of sensors","authors":"J. Viola, E. Baethge, A. Berzoy, J. Restrepo, F. Quizhpi","doi":"10.1109/LASCAS.2014.6820249","DOIUrl":"https://doi.org/10.1109/LASCAS.2014.6820249","url":null,"abstract":"Two methods for the estimation of the DC voltages in the capacitors associated to the DC buses in a cascaded multilevel converter topology are analyzed. To reduce the number of voltage sensors, available information from inductor currents and line voltage sensors is used as input to a discrete time model of the converter. Additionally, information from the switching state of each converter's cell is used allowing an estimation of voltages in each capacitor. Both methods are developed, implemented and simulated for a 9 level three-phase cascaded multilevel converter when it is operated as a controlled rectifier at unity power factor. The analyzed methods have low computational cost allowing its implementation in real time.","PeriodicalId":235336,"journal":{"name":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116604879","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-26DOI: 10.1109/LASCAS.2014.6820250
H. Yamauchi, Worawit Somha
This paper demonstrates the issues of Richardson-Lucy (R-L) deconvolution technique when applying it to analyze the Random Telegraph Noise (RTN) effects on SRAM margin modulation and proposes the techniques to address the issues. Unlike the R-L based deconvolution, the proposed technique successfully circumvents the issue of ringing error thanks to eliminating any operations of differential and division. This effectiveness has been demonstrated for the first time with applying it to a real analysis for the effects of the RTN on the overall SRAM margin variations. It has been shown that the proposed technique can reduce its relative errors of the RTN deconvolution by 1014 and 104 times compared with the cases of the R-L and without segmentation, respectively. This enables to reduce the cdf error of the convolution of the RTN with the Random Dopant Fluctuation (RDF) (i.e., fail-bit-count error) by 10-orders of magnitude of the conventional algorithm.
{"title":"A technique to solve issue of Richardson-Lucy deconvolution for analyzing RTN effects on SRAM margin variation","authors":"H. Yamauchi, Worawit Somha","doi":"10.1109/LASCAS.2014.6820250","DOIUrl":"https://doi.org/10.1109/LASCAS.2014.6820250","url":null,"abstract":"This paper demonstrates the issues of Richardson-Lucy (R-L) deconvolution technique when applying it to analyze the Random Telegraph Noise (RTN) effects on SRAM margin modulation and proposes the techniques to address the issues. Unlike the R-L based deconvolution, the proposed technique successfully circumvents the issue of ringing error thanks to eliminating any operations of differential and division. This effectiveness has been demonstrated for the first time with applying it to a real analysis for the effects of the RTN on the overall SRAM margin variations. It has been shown that the proposed technique can reduce its relative errors of the RTN deconvolution by 1014 and 104 times compared with the cases of the R-L and without segmentation, respectively. This enables to reduce the cdf error of the convolution of the RTN with the Random Dopant Fluctuation (RDF) (i.e., fail-bit-count error) by 10-orders of magnitude of the conventional algorithm.","PeriodicalId":235336,"journal":{"name":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129287627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-26DOI: 10.1109/LASCAS.2014.6820302
Henrique Maich, Vladimir Afonso, B. Zatt, L. Agostini, M. Porto
This paper presents a compression analysis about the High Efficiency Video Coding (HEVC) standard targeting a computational effort reduction at the scope of the motion estimation (ME). Restricting the Prediction Units (PUs) - among a total of 24 sizes - to the 4 square-shaped sizes in the HEVC interframes prediction, it is possible to reduce in 74% the number of operations at the cost of 4% increase in the bit-rate, considering the Y-BD-Rate metric. Based on this evaluation, a simple hardware architecture is proposed to implement the Sum of Absolute Differences (SAD) used in the Fractional Motion Estimation (FME). The proposed architecture is able to calculate SAD with a rate of 30 Full HD (1920×1080) frames per second, requiring a frequency of 1.17GHz. It represents a 63% frequency reduction compared to a scenario where all 24 PU sizes are evaluated.
{"title":"HEVC Fractional Motion Estimation complexity reduction for real-time applications","authors":"Henrique Maich, Vladimir Afonso, B. Zatt, L. Agostini, M. Porto","doi":"10.1109/LASCAS.2014.6820302","DOIUrl":"https://doi.org/10.1109/LASCAS.2014.6820302","url":null,"abstract":"This paper presents a compression analysis about the High Efficiency Video Coding (HEVC) standard targeting a computational effort reduction at the scope of the motion estimation (ME). Restricting the Prediction Units (PUs) - among a total of 24 sizes - to the 4 square-shaped sizes in the HEVC interframes prediction, it is possible to reduce in 74% the number of operations at the cost of 4% increase in the bit-rate, considering the Y-BD-Rate metric. Based on this evaluation, a simple hardware architecture is proposed to implement the Sum of Absolute Differences (SAD) used in the Fractional Motion Estimation (FME). The proposed architecture is able to calculate SAD with a rate of 30 Full HD (1920×1080) frames per second, requiring a frequency of 1.17GHz. It represents a 63% frequency reduction compared to a scenario where all 24 PU sizes are evaluated.","PeriodicalId":235336,"journal":{"name":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114356839","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-26DOI: 10.1109/LASCAS.2014.6820252
R. Gómez‐García, Raul Loeches-Sanchez, J. Muñoz-Ferreras, J. P. Borrego, J. P. Magalhães, N. Carvalho, J. Vieira, F. Pérez-Martínez
In this paper, a new class of microstrip filter with dual-band lowpass/bandpass response is reported. It consists of a periodic-type circuit configuration made up of an original firstorder double-band lowpass/bandpass filtering cell. The operating principle of this lowpass/bandpass filter structure is explained, and guidelines for its systematic design are expounded. Besides, a four-stage prototype with 60-dB inter-band Long-Term-Evolution (LTE) service rejection is designed and simulated at the layout level for verification. This dual-function filter approach can find use in next-generation multi-purpose communications systems simultaneously operating for several standards, such as those handling UHF DVB-T signals - lowpass band - and other services - passband(s) - along with LTE interference mitigation.
{"title":"Dual-band lowpass/bandpass periodic-type microstrip filter with Long-Term-Evolution (LTE) service mitigation","authors":"R. Gómez‐García, Raul Loeches-Sanchez, J. Muñoz-Ferreras, J. P. Borrego, J. P. Magalhães, N. Carvalho, J. Vieira, F. Pérez-Martínez","doi":"10.1109/LASCAS.2014.6820252","DOIUrl":"https://doi.org/10.1109/LASCAS.2014.6820252","url":null,"abstract":"In this paper, a new class of microstrip filter with dual-band lowpass/bandpass response is reported. It consists of a periodic-type circuit configuration made up of an original firstorder double-band lowpass/bandpass filtering cell. The operating principle of this lowpass/bandpass filter structure is explained, and guidelines for its systematic design are expounded. Besides, a four-stage prototype with 60-dB inter-band Long-Term-Evolution (LTE) service rejection is designed and simulated at the layout level for verification. This dual-function filter approach can find use in next-generation multi-purpose communications systems simultaneously operating for several standards, such as those handling UHF DVB-T signals - lowpass band - and other services - passband(s) - along with LTE interference mitigation.","PeriodicalId":235336,"journal":{"name":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131180546","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-26DOI: 10.1109/LASCAS.2014.6820305
E. Pino, M. Campos, P. Aqueveque
This paper presents the design and implementation of a new device to detect and warn the presence of obstacles for the sight impaired. The device is based on the use of ultrasound sensors to measure the distance to the closest object or body located in front of the subject. It then processes that information and notifies the uses through the modulation of a vibrating device. The main goal is to increase the security and autonomy of sight impaired people. Results from a preliminary test with 10 sight impaired volunteers show that the device is easy to use, comfortable and provides adequate information to avoid obstacles.
{"title":"Low-cost obstacle detection device for sight impaired people","authors":"E. Pino, M. Campos, P. Aqueveque","doi":"10.1109/LASCAS.2014.6820305","DOIUrl":"https://doi.org/10.1109/LASCAS.2014.6820305","url":null,"abstract":"This paper presents the design and implementation of a new device to detect and warn the presence of obstacles for the sight impaired. The device is based on the use of ultrasound sensors to measure the distance to the closest object or body located in front of the subject. It then processes that information and notifies the uses through the modulation of a vibrating device. The main goal is to increase the security and autonomy of sight impaired people. Results from a preliminary test with 10 sight impaired volunteers show that the device is easy to use, comfortable and provides adequate information to avoid obstacles.","PeriodicalId":235336,"journal":{"name":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130978332","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-26DOI: 10.1109/LASCAS.2014.6820281
D. Romero, M. Jiménez, G. Jovanovic-Dolecek
Chebyshev Comb Filters (CCFs) are a novel class of low-complexity filters recently introduced in literature, especially useful in multi-stage decimation processes. However, the magnitude response of CCFs presents in the passband region an undesirable droop that increases as the order of the filter increases. In this paper we introduce the design of low-complexity second-order compensators to improve the passband characteristic of CCFs. The proposed compensation filters are designed using the amplitude transformation method recently presented in literature to design traditional comb compensators. A simple formula to obtain the coefficients of the compensator is provided, thus the design becomes straightforward. It is shown by means of a detailed example that the proposed cascaded CCF-compensator has a lower computational complexity comparing to traditional cascaded comb-compensator.
{"title":"Design of Chebyshev Comb Filter (CCF)-based decimators with compensated passband","authors":"D. Romero, M. Jiménez, G. Jovanovic-Dolecek","doi":"10.1109/LASCAS.2014.6820281","DOIUrl":"https://doi.org/10.1109/LASCAS.2014.6820281","url":null,"abstract":"Chebyshev Comb Filters (CCFs) are a novel class of low-complexity filters recently introduced in literature, especially useful in multi-stage decimation processes. However, the magnitude response of CCFs presents in the passband region an undesirable droop that increases as the order of the filter increases. In this paper we introduce the design of low-complexity second-order compensators to improve the passband characteristic of CCFs. The proposed compensation filters are designed using the amplitude transformation method recently presented in literature to design traditional comb compensators. A simple formula to obtain the coefficients of the compensator is provided, thus the design becomes straightforward. It is shown by means of a detailed example that the proposed cascaded CCF-compensator has a lower computational complexity comparing to traditional cascaded comb-compensator.","PeriodicalId":235336,"journal":{"name":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127651324","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-26DOI: 10.1109/LASCAS.2014.6820283
Bruno B. Cardoso, J. Gomes
We present the design of a focal-plane image compression circuit for CMOS cameras. Data compression is obtained by the analog hardware implementation of a lossy algorithm based on wavelet theory and employing zerotree data structures to classify and discard irrelevant information at reduced bandwidth cost. An image sensor with resolution 32 × 32 containing the image processing circuits was designed with 0.35 μm technology. Electrical simulations which consider the CMOS fabrication process variations in accordance to the parameters provided by the foundry were carried out and the results are compared with a system-level numerical simulation of the proposed algorithm. The proposed circuit implementation achieves compression ratio around 3:1 through an iterative process which progressively reduces image resolution. The corresponding image quality (peak signal-to-noise ratio) is around 22.2 dB in Monte Carlo electrical simulations.
{"title":"CMOS imager with focal-plane image compression based on the EZW algorithm","authors":"Bruno B. Cardoso, J. Gomes","doi":"10.1109/LASCAS.2014.6820283","DOIUrl":"https://doi.org/10.1109/LASCAS.2014.6820283","url":null,"abstract":"We present the design of a focal-plane image compression circuit for CMOS cameras. Data compression is obtained by the analog hardware implementation of a lossy algorithm based on wavelet theory and employing zerotree data structures to classify and discard irrelevant information at reduced bandwidth cost. An image sensor with resolution 32 × 32 containing the image processing circuits was designed with 0.35 μm technology. Electrical simulations which consider the CMOS fabrication process variations in accordance to the parameters provided by the foundry were carried out and the results are compared with a system-level numerical simulation of the proposed algorithm. The proposed circuit implementation achieves compression ratio around 3:1 through an iterative process which progressively reduces image resolution. The corresponding image quality (peak signal-to-noise ratio) is around 22.2 dB in Monte Carlo electrical simulations.","PeriodicalId":235336,"journal":{"name":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121907609","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-26DOI: 10.1109/LASCAS.2014.6820264
D. Avila, Enrique Alvarez-Fontecilla, Angel Abusleme
With the adoption of new technology nodes q for analog circuits, different digital techniques have been designed to enhance their performance. Among the existing techniques, a promising approach is to adapt the circuit operation dynamically considering the application characteristics. In the field of analog-to-digital converters (ADCs), typically this approach is carried out by taking advantage of application-dependent signal properties, hence their use is limited. In this work, a digital assistance technique for power reduction in ADCs is presented. By defining a reduced valid range for the next sample based upon the maximum possible change of the input signal between samples, the proposed algorithm reduces the mean energy consumption per conversion in a variety of ADC architectures, regardless of the application.
{"title":"Digital assistance for energy reduction in ADCs using a simple signal prediction algorithm","authors":"D. Avila, Enrique Alvarez-Fontecilla, Angel Abusleme","doi":"10.1109/LASCAS.2014.6820264","DOIUrl":"https://doi.org/10.1109/LASCAS.2014.6820264","url":null,"abstract":"With the adoption of new technology nodes q for analog circuits, different digital techniques have been designed to enhance their performance. Among the existing techniques, a promising approach is to adapt the circuit operation dynamically considering the application characteristics. In the field of analog-to-digital converters (ADCs), typically this approach is carried out by taking advantage of application-dependent signal properties, hence their use is limited. In this work, a digital assistance technique for power reduction in ADCs is presented. By defining a reduced valid range for the next sample based upon the maximum possible change of the input signal between samples, the proposed algorithm reduces the mean energy consumption per conversion in a variety of ADC architectures, regardless of the application.","PeriodicalId":235336,"journal":{"name":"2014 IEEE 5th Latin American Symposium on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122174657","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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