Virtual-Channel Flow Control Across Mesochronous Clock Domains

Abstract

The Network-on-Chip (NoC) is physically spread over the entire chip and it should readily support communication across multiple clock domains. In NoCs, the synchronization required for sending data across clock domains should be seamlessly combined with the flow control rules that govern data transfer on NoC links. In this work, we focus on implementing virtual-channel flow control on links that connect NoC components placed across mesochronous clock domains. In mesochronous interfaces, the connected modules receive the same clock signal but the edges of the arriving clock signals exhibit an unknown phase relationship. To this end, we propose FastCross a loosely-coupled synchronization architecture for NoC links with VC flow control that simplifies hardware implementation by enabling VC buffer sharing and interface consolidation.