Effect-cause intra-cell diagnosis at transistor level

Abstract

Logic diagnosis is the process of isolating possible sources of observed errors in a defective circuit, so that physical failure analysis can be performed to determine the root cause of such errors. Thus, effective and accurate logic diagnosis is crucial to speed up physical failure analysis process and eventually to improve the yield. In this paper, we propose a new intra-cell diagnosis method based on the “Effect-Cause” approach to improve the defect localization accuracy. The proposed approach is based on the Critical Path Tracing here applied at transistor level. It leads to a precise localization of the root cause of observed errors. Experimental results show the efficiency of our approach.