The TCC/MCM: /spl mu/BGA on a laminated substrate

Abstract

One of the technical issues obstructing progress in MCMs is the lack of a cost-effective interconnect which is simultaneously small and testable. None of the standard interconnects - TAB, wirebond or C4 - meet both criteria, and bare die test approaches have significant drawbacks. In this paper, a complete MCM solution will be introduced which consists of a micro-BGA interconnect called the TCC (Tessera Compliant Chip) and a TLS (Tessera Laminated Substrate) substrate. The TCC combines aspects of wirebond, TAB and C4 to give a die-sized, testable package for KGD and MCMs. The TLS is fabricated with a parallel lamination process which allows for blind and buried vias, and high wireability. The /spl mu/BGA is attached to the substrate using conventional SMT assembly. Extensive use of the processes and infrastructure which already exist in the packaging industry make the TCC/MCM a logical extension of current technology and a low-cost alternative for high volume packaging applications. This presentation introduces Tessera's MCM solution, and describes a test-module designed to characterize the high-speed performance of the substrate and TCC. An 8-layer substrate (4S/4P) holding a 600 I/0 processor, two controllers and eight SRAMs is used to evaluate wire-length distribution and electrical performance. Simulations of signal integrity, cross-talk, simultaneous switching noise and interconnect delay will be presented. The performance of the TCC/TLS is compared to copper-polyimide MCM-D.