A carry-free 54 b/spl times/54 b multiplier using equivalent bit conversion algorithm

Abstract

An equivalent bit conversion algorithm (EBCA) is proposed to eliminate the need for final carry propagation in redundant binary (RB) to normal binary (NB) conversion in the RB multiplier. When the EBCA is applied, conventional power-consuming carry-propagating adders are replaced by simple, minimum-sized converters, and complete carry-free multiplication from input to output is achieved. The proposed method significantly reduces the power and the conversion time in the final adder stage of traditional multipliers. The prototype fabricated in 0.35 /spl mu/m CMOS demonstrates that the 54 b/spl times/54 b multiplier consumes only 53.4 mW at 3.3 V for 74 MHz operation.