{"title":"A robust multi-application automatic gain control chip","authors":"N. Ekekwe, R. Etienne-Cummings","doi":"10.1109/MWSCAS.2007.4488585","DOIUrl":null,"url":null,"abstract":"This paper describes the design of a CMOS automatic gain control chip for use in hearing aids and similar applications. It uses linearized MOS resistive circuit to implement the amplifier variable gain thereby overcoming discrete gain step limitation set by using resistors or capacitors. With input stage fully differential operational transconductance amplifier (OTA) whose current outputs drive a high gain transimpedance amplifier (TIA), noise is minimized. To improve gain and performance, a common mode feedback stage is incorporated within the OTA. The chip has a simulated power consumption of 2.45 mW. At frequency of 20 MHz, the harmonic distortion is -48 dB for a 2 MHz 2 Vpp input voltage. A robust design with a single external control, it is designed in 0.5 mum 2P3M CMOS process.","PeriodicalId":256061,"journal":{"name":"2007 50th Midwest Symposium on Circuits and Systems","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 50th Midwest Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2007.4488585","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
This paper describes the design of a CMOS automatic gain control chip for use in hearing aids and similar applications. It uses linearized MOS resistive circuit to implement the amplifier variable gain thereby overcoming discrete gain step limitation set by using resistors or capacitors. With input stage fully differential operational transconductance amplifier (OTA) whose current outputs drive a high gain transimpedance amplifier (TIA), noise is minimized. To improve gain and performance, a common mode feedback stage is incorporated within the OTA. The chip has a simulated power consumption of 2.45 mW. At frequency of 20 MHz, the harmonic distortion is -48 dB for a 2 MHz 2 Vpp input voltage. A robust design with a single external control, it is designed in 0.5 mum 2P3M CMOS process.