A 480MHz ROACH-2 FPGA realization of 2-phase 2-D IIR beam filters for digital RF apertures

Abstract

RF antenna array beamforming based on electronically steerable wideband phased-array apertures find applications in communications, radar, imaging and microwave sensing. High-bandwidth requirements for wideband RF applications necessitate hundreds of MHz or GHz frame-rates for the digital array processor. A systolic architecture is proposed for the real-time implementation of the 2-D IIR beam filter. This implementation employs a differential-form polyphase 2-D IIR frequency-planar beam filter, and a corresponding circuit architecture in order to achieve the real-time computation of the input-output 2-D difference equation that defines the RF beam filter. The feasibility of real-time implementation for dense aperture arrays operating in the 0-240 MHz band using a beam filter is explored. The proposed 2-phase sampling scheme per antenna is based on a 2-D IIR polyphase structure. A digital hardware prototype is designed, implemented and tested using a ROACH-2 fitted with a Xilinx Virtex-6 Sx475t FPGA chip and a 32-channel time-interleaved RF data converter, which support 16 antennas using 2-phase time-interleaved sampling at an FPGA clock rate of 240 MHz.