20, 000-fps Visual Motion Magnification on Pixel-parallel Vision Chip

Abstract

This paper proposes a pixel-parallel Eulerian Video Magnification (EVM) algorithm for vision chips. The proposed algorithm is optimized for the stereotyped programmable pixel-parallel array processor architecture favored by high-speed vision chips. We also propose an improved pixel-parallel array processor with alternative image border padding modes to satisfy various algorithm requirements. We implemented an FPGA prototype of an improved 128 × 128 pixel-parallel array processor to run the proposed optimized EVM algorithm with a 120 MHz clock. Experimental results show that our pixel-parallel system can magnify subtle motion clues at a very high speed up to 20, 000 frames per second (fps).