Redundancy Reliability

Abstract

Programmable redundant row and column elements are presently being used as a yield enhancement tool on the more advanced high density memory devices. This paper summarizes a comprehensive reliability study which was conducted to insure acceptable reliability standards on products using redundancy. Data on fuse programming are presented which indicate acceptable fuse reliability. Also, data are presented which show that the potential problem of contamination entering through the fuse holes has been eliminated with guardrings and circuit layout. Other potential reliability problems with the redundancy concept such as the effects of process defects interacting with adjacent cells and defect clustering were evaluated. The results indicate that standard screening techniques used in previous NMOS technologies are adequate to achieve acceptable reliability. Product data are presented which indicate devices using redundancy are as reliable as previous generation memory devices.