M. Crescentini, M. Bennati, M. Serafini, M. Tartagni
{"title":"Noise folding reduction in discrete-time current sensing","authors":"M. Crescentini, M. Bennati, M. Serafini, M. Tartagni","doi":"10.1109/ECCTD.2011.6043347","DOIUrl":null,"url":null,"abstract":"Current sensing amplifier is one of the basic blocks in biosensing interfaces as current-related phenomena are at the base of biological and chemical interfaces. A wide number of papers have been published in literature on the subject showing both continuous time (CT) and discrete time (DT) approaches. Among them, CT solutions show better performance in terms of input-referred noise floor due to the white noise folding problem with respect to DT schemes. However, the DT design offers an easier approach to structured design and better performance with respect to the scaling trend in CMOS process. This paper shows a new technique to reduce folding process in CMOS DT current amplifiers by decoupling basic noise constraints so as to compete with CT solutions.","PeriodicalId":126960,"journal":{"name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCTD.2011.6043347","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Current sensing amplifier is one of the basic blocks in biosensing interfaces as current-related phenomena are at the base of biological and chemical interfaces. A wide number of papers have been published in literature on the subject showing both continuous time (CT) and discrete time (DT) approaches. Among them, CT solutions show better performance in terms of input-referred noise floor due to the white noise folding problem with respect to DT schemes. However, the DT design offers an easier approach to structured design and better performance with respect to the scaling trend in CMOS process. This paper shows a new technique to reduce folding process in CMOS DT current amplifiers by decoupling basic noise constraints so as to compete with CT solutions.