Single-chip 5.8 GHz ETC transceiver IC with PLL and demodulation circuits using SiGe HBT/CMOS

T. Masuda, K. Ohhata, N. Shiramizu, S. Hanazawa, M. Kudoh, Y. Tanba, Y. Takeuchi, H. Shimamoto, T. Nagashima, K. Washio
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引用次数: 25

Abstract

A single-chip 5.8 GHz ETC transceiver IC with PLL and demodulator uses SiGe HBT/CMOS. The fully integrated ETC chip includes a 31 dB-gain RX stage, an ASK demodulator, and a high-precision RSSI. The PLL is constructed with a varactor-tuned LC-VCO and a low-power BiCMOS synthesizer. The TX stage incorporates a transformer-transferred single-ended PA.
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单片5.8 GHz ETC收发电路,锁相环和解调电路采用SiGe HBT/CMOS
带锁相环和解调器的单片5.8 GHz ETC收发器IC采用SiGe HBT/CMOS。完全集成的ETC芯片包括一个31 db增益的RX级,一个ASK解调器和一个高精度RSSI。锁相环由变容调谐LC-VCO和低功耗BiCMOS合成器组成。TX级包含一个变压器传输的单端PA。
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