Kaijie Ding, D. Milosevic, V. Vidojkovic, Rainier van Dommele, M. Bentum, P. Baltus
{"title":"A 23 G Hz RF - beamforming Transmitter with > 15.5 dBm $\\mathrm{P}_{\\text{sat}}$ and >21.7% Peak Efficiency for Inter-satellite Communications","authors":"Kaijie Ding, D. Milosevic, V. Vidojkovic, Rainier van Dommele, M. Bentum, P. Baltus","doi":"10.1109/RFIC54546.2022.9863123","DOIUrl":null,"url":null,"abstract":"This paper presents a 23GHz RF -beamforming transmitter (TX) for inter-satellite communications. By combining a variable gain amplifier (VGA), a phase shifter (PS), and a four-inductor-coupling differential quadrature-signal (IQ) generator, a power-efficient design with high compactness is demonstrated. The chip is fabricated in a 130nm SiGe BiCMOS technology. It achieves a measured saturated output power (Psat) of >15.5dBm and a peak TX efficiency of >21.7%, with 2.09° RMS phase error and >29.3dB maximum power gain. The realized mm-wave TX supports 64-QAM with a 900Mbps data rate, the Error Vector Magnitude (EVM) of 4.98% (-26.06dB), the Adjacent Channel Power Ratio (ACPR) of −30.1dBc, and TX efficiency of 8.52% are measured at 9.2dBm output power. The core area of this TX is 0.9mm x 0.23mm.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC54546.2022.9863123","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a 23GHz RF -beamforming transmitter (TX) for inter-satellite communications. By combining a variable gain amplifier (VGA), a phase shifter (PS), and a four-inductor-coupling differential quadrature-signal (IQ) generator, a power-efficient design with high compactness is demonstrated. The chip is fabricated in a 130nm SiGe BiCMOS technology. It achieves a measured saturated output power (Psat) of >15.5dBm and a peak TX efficiency of >21.7%, with 2.09° RMS phase error and >29.3dB maximum power gain. The realized mm-wave TX supports 64-QAM with a 900Mbps data rate, the Error Vector Magnitude (EVM) of 4.98% (-26.06dB), the Adjacent Channel Power Ratio (ACPR) of −30.1dBc, and TX efficiency of 8.52% are measured at 9.2dBm output power. The core area of this TX is 0.9mm x 0.23mm.
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