Power reduction in wireless receivers through multistage digital filtering and quantization

1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461) Pub Date : 1999-10-20 DOI:10.1109/SIPS.1999.822358

J. Andrews, T. Meng

引用次数: 1

Abstract

The number of bits required to accurately represent a received signal in a wireless system changes as the out-of-band interference is removed by an IIR digital filter, if the filtering is done in stages, such as second-order sections. Taking advantage of this fact can reduce the size of the datapath in a VLSI realization of a digital filter, and hence power and area can be saved without decreasing performance. An effective algorithm for computing this reduced number of bits to use for quantization after each stage is derived, and a scheme for optimally ordering the second-order sections is presented, power savings range from 33% to 50%, depending on the amount of out-of-band interference.

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通过多级数字滤波和量化降低无线接收机的功率

如果滤波是分阶段进行的，比如二阶部分，那么在无线系统中精确表示接收信号所需的比特数会随着带外干扰被IIR数字滤波器去除而变化。利用这一点可以减少数字滤波器的VLSI实现中数据路径的尺寸，因此可以在不降低性能的情况下节省功率和面积。推导了一种有效的算法来计算每个阶段后用于量化的减少的比特数，并提出了一种优化排序二阶部分的方案，根据带外干扰的数量，功耗节省范围从33%到50%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461)

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