Quasi FGMOS Inverter: A Strategy for low power applications

Abstract

Low voltage operation and low power consumption is of paramount need in integrated circuits which are employed in portable devices. Floating gate MOS (FGMOS) transistor is an analog technique to achieve low power while maintaining performance in various applications such as neural networks, PLL, D/A and A/D converters and memory circuits. This paper deals with various FGMOS techniques with supply voltage $\mathrm{V_{DD}}=220\mathrm{mV}$ operating in sub-threshold region which is very crucial for lowering power dissipation and achieves higher speed compared to CMOS circuits. The proposed work is validated through inverter circuits using TSMC $\mathbf{0.18\mu{m}}$ technology in mentor graphics tool.