An improved switching and reset architecture for linear phase recursive filters

Abstract

A family of recursive exponential linear phase FIR filters was proposed in a previous work. The switching and reset method was subsequently used to create a stable implementation of an otherwise unstable pole-zero cancelation in those filters. In this work, we propose an improved switching and reset architecture that delivers the same results at a reduced hardware cost. The main advantage of this architecture lies in its ability to implement an exponential filter, of an arbitrary order N using only six adders, four multipliers, four multiplexers, and N +3 registers. Various order Exponential filters are synthesized on FPGA devices in both the improved and the traditional architectures. The results show that the improved architecture provides significant savings in both logic elements and register count, especially for higher values of N. Simulation results show that the impulse and step responses of the presented implementation accurately approximate the responses of a traditional, non-recursive exponential filter.