{"title":"A simulation study of simultaneous switching noise","authors":"C. Chen, J. Zhao, Q. Chen","doi":"10.1109/ECTC.2001.927956","DOIUrl":null,"url":null,"abstract":"This paper describes a new methodology for simultaneous switching noise (SSN) simulations by using a system level signal integrity (SI) analysis software, which is combinations of a quick full wave electromagnetic field solver for multiple-layer structure based on FDTD (Finite Difference Time Domain) and a circuit solver. The solution is based on the geometry, material, stack-up structure, and basic circuit information. The simultaneous switching noise issue is studied for two types of chipset packages-OLGA (Organic Land Grid Array) and WBGA (Wirebond Ball Grid Array)-with 40 drivers switching simultaneously. Different simulation conditions, such as with or without on-die interconnection model, different on-die decoupling capacitor values, are imposed during the simulations. Simultaneous switching noise (SSN) effects such as skew, signal overshoot, ring back, and power-ground voltage fluctuations, are obtained and compared. These data can be used for a design guideline specification or for package performance improvement purposes. It is believed that all these studies are very informative to chip and package analysis and design for high-speed system applications.","PeriodicalId":340217,"journal":{"name":"2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2001.927956","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 21
Abstract
This paper describes a new methodology for simultaneous switching noise (SSN) simulations by using a system level signal integrity (SI) analysis software, which is combinations of a quick full wave electromagnetic field solver for multiple-layer structure based on FDTD (Finite Difference Time Domain) and a circuit solver. The solution is based on the geometry, material, stack-up structure, and basic circuit information. The simultaneous switching noise issue is studied for two types of chipset packages-OLGA (Organic Land Grid Array) and WBGA (Wirebond Ball Grid Array)-with 40 drivers switching simultaneously. Different simulation conditions, such as with or without on-die interconnection model, different on-die decoupling capacitor values, are imposed during the simulations. Simultaneous switching noise (SSN) effects such as skew, signal overshoot, ring back, and power-ground voltage fluctuations, are obtained and compared. These data can be used for a design guideline specification or for package performance improvement purposes. It is believed that all these studies are very informative to chip and package analysis and design for high-speed system applications.