{"title":"CCII+ current conveyor based BIC monitor for I/sub DDQ/ testing of complex CMOS circuits","authors":"V. Stopjaková, H. Manhaeve","doi":"10.1109/EDTC.1997.582369","DOIUrl":null,"url":null,"abstract":"In this paper, a quiescent built-in current (BIC) monitor based on a second generation current conveyor CCII+ is presented. The monitor circuit minimises the power supply voltage degradation and provides a sensitive detection of defects that cause an elevated value of the I/sub DDQ/ current The proposed monitor offers an accurate current measurement and has a wide operation range. The CCII+ based current monitor is able to handle huge digital ASICs. Significant results summarising possibilities and limitations of the circuit are discussed as well. The design was implemented through Alcatel-Mietec 0.7 /spl mu/m CMOS technology and an evaluation of the prototype chips has been carried out. An experimental application of the proposed monitor in new analogue self-test structure was considered.","PeriodicalId":297301,"journal":{"name":"Proceedings European Design and Test Conference. ED & TC 97","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings European Design and Test Conference. ED & TC 97","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDTC.1997.582369","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 24
Abstract
In this paper, a quiescent built-in current (BIC) monitor based on a second generation current conveyor CCII+ is presented. The monitor circuit minimises the power supply voltage degradation and provides a sensitive detection of defects that cause an elevated value of the I/sub DDQ/ current The proposed monitor offers an accurate current measurement and has a wide operation range. The CCII+ based current monitor is able to handle huge digital ASICs. Significant results summarising possibilities and limitations of the circuit are discussed as well. The design was implemented through Alcatel-Mietec 0.7 /spl mu/m CMOS technology and an evaluation of the prototype chips has been carried out. An experimental application of the proposed monitor in new analogue self-test structure was considered.