{"title":"Rapid architecture prototyper (RAP)","authors":"M. Andrews","doi":"10.1109/HICSS.1989.47137","DOIUrl":null,"url":null,"abstract":"A novel hardware prototyper is described for rapid retargeting of hardware and compilers. Architects can directly create a machine organization, using compiler support design tradeoffs. This rapid prototyping tool features relatively simple hosting (on a PC-AT), diverse target architectures, and minimal use of host memory. It provides simple and rapid retargeting through careful utilization of code transformations and expansions internal to the tool. It can be used to test computing hardware by the direct simulation of applications code written in C. Optimization techniques are applied both at the language-dependent level to the intermediate form by shape analysis and during code generation through cost analysis. A major advantage is a significant reduction in microcode development time.<<ETX>>","PeriodicalId":300182,"journal":{"name":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HICSS.1989.47137","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A novel hardware prototyper is described for rapid retargeting of hardware and compilers. Architects can directly create a machine organization, using compiler support design tradeoffs. This rapid prototyping tool features relatively simple hosting (on a PC-AT), diverse target architectures, and minimal use of host memory. It provides simple and rapid retargeting through careful utilization of code transformations and expansions internal to the tool. It can be used to test computing hardware by the direct simulation of applications code written in C. Optimization techniques are applied both at the language-dependent level to the intermediate form by shape analysis and during code generation through cost analysis. A major advantage is a significant reduction in microcode development time.<>