{"title":"Firmware Generation Architecture for Memory BIST","authors":"D. Sargsyan","doi":"10.1109/EWDTS.2018.8524853","DOIUrl":null,"url":null,"abstract":"The safety and reliability requirements for automotive SoCs are becoming stronger requiring more complex and flexible solutions. Hardware implementation of test algorithms in memory built-in self-test (BIST) scheme allows in-field testing only with predefined instructions which restricts flexibility of system test in mission mode. In this paper, firmware generation architecture for memory BIST is described which allows to control mission mode access to embedded memories and makes the in-field testing more flexible.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"268 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE East-West Design & Test Symposium (EWDTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EWDTS.2018.8524853","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
The safety and reliability requirements for automotive SoCs are becoming stronger requiring more complex and flexible solutions. Hardware implementation of test algorithms in memory built-in self-test (BIST) scheme allows in-field testing only with predefined instructions which restricts flexibility of system test in mission mode. In this paper, firmware generation architecture for memory BIST is described which allows to control mission mode access to embedded memories and makes the in-field testing more flexible.
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