Dong Zheng, Xuecheng Jin, E. Cheung, M. Rana, Gengyue Song, Yong Jiang, Y. Sutu, Bin Wu
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引用次数: 20
Abstract
A 0.18 /spl mu/m/sup 2/ CMOS quad transceiver provides 12.5 Gb/s full-duplex raw data throughput at 200 mW/channel consumption. An analog phase rotator in CDR (clock/data recovery) eliminates the quantization error of digital phase interpolation techniques, resulting in <17 ps peak-peak output jitter.
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