B. Reniwal, V. Vijayvargiya, Pooran Singh, S. Vishvakarma, D. Dwivedi
{"title":"Dataline Isolated Differential Current Feed/Mode Sense Amplifier for Small Icell SRAM Using FinFET","authors":"B. Reniwal, V. Vijayvargiya, Pooran Singh, S. Vishvakarma, D. Dwivedi","doi":"10.1145/2742060.2742104","DOIUrl":null,"url":null,"abstract":"This paper for the first time presents a novel, high-performance and robust current feed sense amplifiers (CF-SA) design for small ICell SRAM in 20nm Fin-shaped field effect transistor (FinFET) technology. The CFSA incorporates isolated DL current sensing approach which provides the higher Current Ratio Amplification (CRA) factor. The CF-SA significantly outperforms with 66.89% and 31.47% lower sensing delay than CCSA [13] and HSA [8] respectively under similar ICell and bit-line and data-line capacitance. Our results show that even at the worst corner the CF-SA demonstrates 2.15x and 3.02x higher differential current and 2.23x and 1.7x higher data-line differential voltage with 66.6% and 34.32% higher mean (μ) than those of the best prior arts. Furthermore, failure probability of the proposed design against process parameter variations is rigorously analyzed through Monte Carlo simulations.","PeriodicalId":255133,"journal":{"name":"Proceedings of the 25th edition on Great Lakes Symposium on VLSI","volume":"207 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 25th edition on Great Lakes Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2742060.2742104","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
This paper for the first time presents a novel, high-performance and robust current feed sense amplifiers (CF-SA) design for small ICell SRAM in 20nm Fin-shaped field effect transistor (FinFET) technology. The CFSA incorporates isolated DL current sensing approach which provides the higher Current Ratio Amplification (CRA) factor. The CF-SA significantly outperforms with 66.89% and 31.47% lower sensing delay than CCSA [13] and HSA [8] respectively under similar ICell and bit-line and data-line capacitance. Our results show that even at the worst corner the CF-SA demonstrates 2.15x and 3.02x higher differential current and 2.23x and 1.7x higher data-line differential voltage with 66.6% and 34.32% higher mean (μ) than those of the best prior arts. Furthermore, failure probability of the proposed design against process parameter variations is rigorously analyzed through Monte Carlo simulations.