Single reference continuous rate clock and data recovery from 30 Mbit/s to 3.2 Gbit/s

Abstract

Today's networks encompass a myriad of bit rates, both new appearing rates as well as legacy ones. To cover all these bit rates, a continuous rate chip-set was developed, containing a continuous rate clock and data recovery, capable of recovering any bit rate between 30 Mbit/s and 3.2 Gbit/s. While using only one single reference frequency, a frequency acquisition loop, based on a fractional-N divider and a frequency window detector, provides 4.8 Hz frequency resolution. A built-in PRBS generator provides for high frequency testing.